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Cadence Pegasus certified for Samsung 5nm and 7nm processes

Cadence Pegasus certified for Samsung 5nm and 7nm processes Cadence Design Systems has confirmed that that its Pegasus Verification System has achieved certification for Samsung Foundry’s 5nm and 7nm process technologies. The physical verification flow has been optimised to enable customers using Samsung Foundry’s advanced nodes to reach signoff accuracy and runtime goals in a variety of market areas, including the mobile and hyperscale markets. Samsung Foundry also delivered an enhanced, signoff-accurate process design kit (PDK) to facilitate the adoption of the Pegasus Verification System on the Samsung 5nm and 7nm technologies. Pegasus provides massive scalability, which in turn leads to faster turnaround times and more predictable design cycle times with design rule checks (DRCs), layout versus schematic (LVS), hierarchical metal fill (HMF) insertion and design-for-manufacturing (DFM) signoff.

Cadence Pegasus Verification System Certified for Samsung Foundry 5nm and 7nm Process Technologies

Physical verification flow optimized for mobile and hyperscale advanced-node design development SAN JOSE, Calif., April 19, 2021 Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that the Cadence® Pegasus™ Verification System has achieved certification for Samsung Foundry’s 5nm and 7nm process technologies. Through the collaboration with Samsung Foundry, the Cadence physical verification flow has been optimized to enable customers using Samsung Foundry’s advanced nodes to reach signoff accuracy and runtime goals in a variety of market areas, including the mobile and hyperscale markets. Samsung Foundry also delivered an enhanced, signoff-accurate process design kit (PDK) to facilitate the adoption of the Pegasus Verification System on the Samsung 5nm and 7nm technologies.

Collaboration Accelerates Hyperscale Computing SoC Design for Process Nodes

Collaboration looks to accelerate hyperscale computing SoC design

Collaboration looks to accelerate hyperscale computing SoC design Cadence Design Systems has revealed that it has optimised the Cadence digital 20.1 full flow for Samsung Foundry’s advanced-process technologies down to 4nm. As a consequence of the company s collaboration designers can now use Cadence tools to achieve optimal power, performance, and area (PPA) and deliver accurate, first-pass silicon for hyperscale computing applications. Cadence s digital 20.1 flow is able to provide capabilities that are well-suited for Samsung Foundry’s advanced-process technologies. For example, the iSpatial technology allows a seamless transition from the Genus Synthesis Solution to the Innovus Implementation System using a common user interface and database.

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