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Cadence and UMC collaborate on 22ULP/ULL reference flow certification

Cadence and UMC collaborate on 22ULP/ULL reference flow certification Cadence Design Systems and the semiconductor foundry, UMC, have announced that the Cadence digital full flow has been optimised and certified for the UMC 22ULP/ULL process technologies to accelerate consumer, 5G and automotive application design. The flow, which incorporates leading implementation and signoff technology for ultra-low power designs, will enable customers to achieve a much faster path to tape-out. The Cadence digital full flow that has been optimized for use on UMC’s 22ULP/ULL process technologies includes the Innovus Implementation System, Genus Synthesis Solution, Liberate Characterization, Quantus Extraction Solution, Tempus Timing Signoff Solution, Litho Physical Analyzer and Physical Verification System.

Cadence Design Systems, Inc (NASDAQ:CDNS) - AI Solutions Provider EdgeCortix Deploys Cadence Tools for Chip Designing

Cadence Collaborates with TSMC to Accelerate Mobile, AI and Hyperscale Computing Application Development on N3 and N4 Processes

SAN JOSE, Calif., May 27, 2021 Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that it is expanding its collaboration with TSMC to accelerate mobile, AI and hyperscale computing application design using the integrated Cadence® digital flow and custom/analog tool suite on TSMC’s N3 and N4 process technologies. Joint Cadence and TSMC customers have already successfully…

Cadence collaboration with Arm enables tape-out of next-generation mobile designs

Cadence collaboration with Arm enables tape-out of next-generation mobile designs Cadence Design Systems has announced that a collaboration with Arm has enabled customers to successfully tape-out next-generation Arm mobile designs. According to Cadence, customers have successfully taped out mobile SoCs using its tools for the next-generation Arm mobile solution, which includes the Arm Cortex-X2, Cortex-A710, and Cortex-A510 CPUs, Mali-G710 GPU and the DynamIQ Shared Unit-110. As part of the collaboration, Cadence has fine-tuned its digital and verification full flows on 5nm and 7nm process technologies to drive adoption of the new Arm mobile solution on the Armv9 architecture. In addition, Cadence delivered 5nm and 7nm RTL-to-GDS digital flow Rapid Adoption Kits (RAKs) to enable customers to achieve optimal power, performance and area (PPA) and accelerate time to tape-out.

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