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Collaboration Accelerates Hyperscale Computing SoC Design for Process Nodes

Collaboration looks to accelerate hyperscale computing SoC design

Collaboration looks to accelerate hyperscale computing SoC design Cadence Design Systems has revealed that it has optimised the Cadence digital 20.1 full flow for Samsung Foundry’s advanced-process technologies down to 4nm. As a consequence of the company s collaboration designers can now use Cadence tools to achieve optimal power, performance, and area (PPA) and deliver accurate, first-pass silicon for hyperscale computing applications. Cadence s digital 20.1 flow is able to provide capabilities that are well-suited for Samsung Foundry’s advanced-process technologies. For example, the iSpatial technology allows a seamless transition from the Genus Synthesis Solution to the Innovus Implementation System using a common user interface and database.

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