AMD is planning to introduce an active bridge chiplet with integrated cache on an upcoming GPU architecture. A new patent filed by the company has been spotted describing the use of the active bridge chiplet, which seems to offer a significant upgrade over the passive bridge chiplet design showed earlier this year. According to the patent shared on Reddit by u/marakeshmode, the active bridge chiplet would work an intercommunication lane across the chiplet dies. This would also feature a shared L3 cache buffer for all compute units, similar to Infinity Cache on Radeon RX 6000 series GPUs. The patent further explains that any communication made between the GPU chiplets would go through the active bridge chiplet. For developers, the new GPUs would work as a single, monolithic GPU, ignoring any chiplet-specific considerations from older MCM designs.