HBM3 PHY IP Core
The MidasCORE High-Bandwidth Memory Generation 3 (HBM3) PHY is ideal for applications involving graphics, high-performance computing, high-end networking, ...
Source: design-reuse.com
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MIPI D-PHY Universal IP in TSMC 40LP for Automotive
The MIPI D-PHY Transmitter is a high-frequency low-power, low-cost, source-synchronous, Physical Layer compliant with the MIPI Alliance Standard for D-PHY.
Source: design-reuse.com
MIPI D-PHY CSI-2 RX+ (Receiver) IP in TSMC 28HPM
The MXL-DPHY-CSI-2-RX+ is a high frequency low-power, low-cost, source-synchronous, Physical Layer compliant with the MIPI Alliance Standard for D-PHY. ...
Source: design-reuse.com
MIPI D-PHY CSI-2 RX+ (Receiver) IP in UMC 40ULP
The MXL-DPHY-CSI-2-RX+ is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Specification for D-PHY ...
Source: design-reuse.com
MIPI D-PHY CSI-2 RX+ (Receiver) IP in TSMC 40LP
The MXL-DPHY-CSI-2-RX+ is a high-frequency low-power, low-cost, source-synchronous, Physical Layer that supports the MIPI® Alliance Standard for D-PHY. ...
Source: design-reuse.com