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Monheim am Rhein, Germany – March 24th, 2022 SEGGER’s Embedded Studio for RISC-V, Version 6, now uses real-time memory management which improves efficiency and response time when allocating and freeing up memory, satisfying requirements for hard real-time in applications written in C++. The new version supports all common RISC-V 32-bit and 64-bit cores, including but not…
Monheim am Rhein, Germany – March 10th, 2022 SEGGER today announces its partnership with HPMicro Semiconductor Inc. (HPMicro), a leading supplier of high-performance MCUs and embedded solutions. The partnership focuses on making SEGGER’s top-rated, multi-platform IDE Embedded Studio available, free of charge, to all HPMicro’s customers using HPM6000 series RISC-V microcontrollers, boosting the RISC-V ecosystem. Embedded Studio…
As a free and open instruction set architecture, RISC-V has shaken things up in the processor realm by offering an ISA that everyone can use without paying a license fee. Processor, SoC, IP and tool vendors have been rolling out a steady stream of products based on RISC-V.
SEGGER's new release of Embedded Studio for RISC-V adds support for 64-bit RISC-V CPUs, including RV64I, RV64G / RV64E and RV64GC / RV64EC with floating-point unit. It comes integrated with SEGGER's emRun C/C++ runtime and emFloat floating-point libraries, the SEGGER Linker, and the SEGGER Compiler.
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