DisplayPort 1.4 IP-core IP Core
Introducing our DisplayPort 1.4 IP-core – the perfect solution for your DisplayPort needs! This compact and easy-to-use IP-core is available as ...
Source: design-reuse.com
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FPGA Lock IP IP Core
The FPGA Lock is a small FPGA IP core that uses the $0.52 Microchip ATSHA204A hardened crypto authentication IC and one FPGA pin to lock down FPGAs and ...
Source: design-reuse.com
LPDDR5X/5/4X PHY on Samsung SF4X
The Synopsys LPDDR5X/5/4X PHY is Synopsys’ physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and system- in- package ...
Source: design-reuse.com
USB 3.1 PHY (10G/5G) in Samsung (14nm, 11nm, 10nm, 8nm, SF5, SF5A, SF4E)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offering ...
Source: design-reuse.com
NVM FTP Trim in TowerJazz (180nm)
Synopsys Non-Volatile Memory (NVM) IP provides reprogrammable NVM supporting up to 1 million bits (1Mbit) configurations in standard CMOS and BCD process ...
Source: design-reuse.com