Imperas Leads The RISC-V Processor Verification Ecosystem
Imperas Leads The RISC-V Processor Verification Ecosystem Verification IP extended with Floating-Point architectural validation test suites based on golden reference model and coverage-based development. Oxford, United Kingdom, January 25th, 2021 — Imperas Software Ltd., the leader in RISC-V processor verification technology, today announced the latest addition to the Imperas RISC-V Verification IP (VIP) solutions with the Floating-Point architectural validation test suites covering the RISC-V Specifications for 32bit Single-Precision (32F), 64bit Single-Precision (64F), and 64bit Double-P...
Source: eejournal.com