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SmartDV Provides Broad Portfolio of Memory Modeling, Design and Verification Solutions

SmartDV Provides Broad Portfolio of Memory Modeling, Design and Verification Solutions
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SmartDV Leads Industry with Greatest Number of Design and Verification MIPI Protocol Standards Solutions for Mobile Applications

SmartDV Leads Industry with Greatest Number of Design and Verification MIPI Protocol Standards Solutions for Mobile Applications
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Deepak Kumar Tala , Verification Intellectual Property , தீபக் குமார் தலா , சரிபார்ப்பு அறிவுசார் ப்ராபர்டீ ,

SmartDV Leads Industry with Greatest Number of Design and Verification MIPI Protocol Standards Solutions for Mobile Applications

SmartDV Leads Industry with Greatest Number of Design and Verification MIPI Protocol Standards Solutions for Mobile Applications
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Deepak Kumar Tala , Nanette Collins , Hardware Emulation , Post Silicon Validation , Verification Intellectual Property , San Jose , தீபக் குமார் தலா , நானெட் கோலின்ஸ் , சரிபார்ப்பு அறிவுசார் ப்ராபர்டீ , சான் ஜோசே ,

SmartDV Joins the Xilinx Partner Program

SmartDV Joins the Xilinx Partner Program
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Xilinx Fpgas , Xilinx Partnership Program , Xilinx Partner Program , Verification Intellectual Property , Xilinx Compliant Design , San Jose , சரிபார்ப்பு அறிவுசார் ப்ராபர்டீ , சான் ஜோசே ,

SmartDV Unveils Automation Tool Suite for Use with Its Extensive Verification IP Portfolio

Improves Productivity, Eliminates Tedious, Error-Prone Manual Effort
SAN JOSE, CALIF. –– May 4, 2021 –– SmartDV™ Technologies, the leader in Design and Verification Intellectual Property (IP), today unveiled a tool suite that automates the protocol debugging process and testbench creation by eliminating tedious and error-prone manual approaches and improving productivity.
The automation suite includes SmartViP Debug™, a tool that automatically identifies protocol violations with visual and tabular views, and SmartTestBench™. SmartTestBench automates the creation of testbench files, either through a graphical user interface or through text files, and supports a wide variety of verification scenarios.
“Detecting, debugging and fixing protocol violations is a critical part of the verification flow,” says Deepak Kumar Tala, SmartDV’s managing director. “It is also time-consuming and typically requires detailed knowledge about the specific protocol b ....

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