Atomic Instructions News Today

The BA51 is a highly configurable, low-power deeply embedded RISC-V processor IP core. It implements a single-issue, in-order, 2-stage execution pipeline, ...

RISC-V, the open-source Instruction Set Architecture (ISA) that was thought to have no real chance of becoming a standard in the semiconductor market, now has 14% of the global processor market. This astounding accomplishment is due to the exceptional teams RISC-V employs. We look back over the company's outstanding year and its advancements in the industry as well as those of its sister organizations, especially SiFive. Its journey is one bordered with skepticism but paved with remarkable...

A low-power, 5-stage, 32-bit RISC-V processor IP core for deeply embedded applications in FPGAs and ASICs.

A low-power 32-bit RISC-V processor IP core for deeply embedded applications in FPGAs and ASICs.

The BA53 is a configurable, low-power, deeply-embedded RISC-V processor IP core. It implements a single-issue, in-order, 5-stage execution pipeline, and ...

The BA51 is a highly configurable, low-power deeply embedded RISC-V processor IP core. It implements a single-issue, in-order, 2-stage execution pipeline, ...