Page 50 - P Core News Today

The MXL-LVDS-DPHY-DSI-TX is a combo PHY that consists of a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI ...

The number of connected devices, machines, sensors, or simply things are linked with each other over open communication networks on the internet of things ...

CT20115 is a low power oscillator with internal RC designed to meet power budget target for portable and battery-operated devices. Internal trimming ...

The A14B400M-TS28H is an ultra low-power, high-performance analog to digital converter (ADC) intellectual property (IP) design block. It has 14-bit resolution ...

The MXL-LVDS-D-PHY-CSI-TX-TW-65BSB is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification ...

Intrinsic ID Zign™ RNG is an embedded software IP solution that enables device manufacturers and designers to add a random number generator to their ...

The DRV64IMZicsr is a 64-bit RISC-V CPU with M, Zicsr extensions and External Debug support. As a part of the DRVX Core Family this unique CPU offers: ...

Arteris IP FlexNoC 5 network-on-chip (NoC) physically aware interconnect IP improves development time, performance, power consumption, and die size of ...

Synopsys’ integrated DesignWare C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and ...

The MXL-DPHY-CSI-2-RX+ is a high-frequency low-power, low-cost, source-synchronous, Physical Layer that supports the MIPI® Alliance Standard for D-PHY. ...