Page 48 - P Core News Today

The Movellus™ high-performance Aeonic Generate Clock Generation Module (CGM) is a high-quality clock synthesis IP that is part of the Movellus Aeonic™ ...

The logi3D graphics accelerator IP core is specifically designed for the new Xilinx Zynq-7000 All Programmable SoC. Designers can add attractive 3D graphics, ...

Latest and forthcoming CMOS image sensors surpass 10M pixels, and output video at 30 and even 60 fps. This development requires high bandwidth between ...

<b>In cryptography, an attack can be performed by injecting one or several faults into a device thus disrupting the functional behavior of the device. ...

The ZeusCORE Xtra-Long-Reach (XLR) Multi-Standard-Serdes (MSS) IP is the highest performance SerDes in the Alphawave IP product portfolio. It is a highly ...

NovuTensor™ IP cores provide highly configurable AI acceleration capabilities with industry-leading performance efficiency. This patented, domain-specific ...

The Synopsys ARC Software Test Library (STL) for ARC Processors is a hardware safety mechanism, as defined in the ISO 26262 standard, implemented in software; ...

The MXL-CD-PHY-CSIRX+-T-N6 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification for ...

The MXL-D-PHY-CSI-2-RX is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Specification for D-PHY ...

The MXL-D-PHY-UNIV-T-22ULP is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification for ...