Page 95 - P Core News Today

GRCANFD is a VHDL IP core implementing a CAN-FD controller compatible with both CAN 2.0B and CAN-FD. It consists of an internal CAN-FD codec and a top ...

The EIP-57 is the IP for accelerating the various secure hash integrity algorithms like MD5 (RFC1231), SHA-1 (FIPS-180-2), SHA-2 (FIPS-180-3/4) and SHA-3 ...

A single DCDC converter that can generate all the power supplies from a Li+ battery for a typical SoC or mixed signal IC. Typical output voltages include ...

The EIP-150 is an integrated module combining the Public Key Acceleration module, True Random Generator, interrupt controller and a standard bus interface ...

PVT Detector is a unique solution intended to continuously monitor IC status at several on-die locations. It is able to detect manufacturing process deviation, ...

MiniMiser™ is a tuneable multi-port register file architecture that can support both low power and high-performance applications. Its unique implementation ...

The logiJPGD-LS Motion JPEG (MJPEG) Decoder is Xylon’s logicBRICKS IP core for still image and video decompression applications on AMD-Xilinx MPSoC, ...

The Digital Blocks DB9000AHB TFT LCD Controller IP Core interfaces a microprocessor and frame buffer memory via the AMBA 2.0 AHB Bus to a TFT LCD panel. ...

The MACsec-IP-161 is a versatile MACsec solution for silicon devices that require plug-and-play MACsec processing for an Ethernet port at full line rate. ...

The multi-channel DesignWare® PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ ...