Page 93 - P Core News Today

IGAD2DX03A is a GLink-3D high speed die-to-die interface Slave PHY. It is used to transmit data between dies and assembled using TSMC System on Integrated ...

Alphawave provides a family of GFP-F IP blocks for all applications and size constraints ready for FPGA and ASIC solutions. The family covers single ...

Origin E6 runs the breadth of models for general applications such as smartphones, tablets, and edge servers. It enables L3 cache or DRAM access during ...

The 1.2V GPIO library provides a bidirectional I/O driver for Parallel Trace Interface applications. This cell is compliant with version 2.0 of the the ...

Rambus PCIe 2.1 Controller is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. Rambus PCIe 2.1 Controller ...

The Rambus FIPS Security Toolkit (formerly from Inside Secure) is a complete cryptographic security solution for IoT providing the tools required to secure ...

M31 USB3.2 Gen1X1 transceiver IP provides a complete range of USB3.2 Gen1X1 host and peripheral applications. It is compliant with the PIPE 4.0 and UTMI+ ...

The Roa Logic AHB-Lite APB4 Bridge is a fully parameterized soft IP interconnect bridge between the AMBA 3 AHB-Lite v1.0 and AMBA APB v2.0 bus protocols. ...

The Reorder Core from Rambus reorders requests based on first on priority and second on throughput optimization. Throughput optimization includes moving ...

Origin E2 is designed for low power applications such as mobile phones. It uses on-chip memory only. By eliminating the need for DRAM access, it saves ...