Page 7 - Semiconductor Ip News Today

Mem Test Analyzer Core The Northwest Logic Mem Test Analyzer Core from Rambus is used to capture the results from Northwest Logic Memory Test Core. The Mem Test Analyzer Core can be used in conjunction with the Memory Test Core to capture the actual and expected test data. The capture is initiated by an error trigger signal provided by the Memory Test Core. This data can then be retrieved from the Mem Test Analyzer Core via the chip’s configuration & status bus, on-chip processor or ded...

AES (ECB), 1 Billion Trace DPA Resistant Cryptographic Accelerator Cores Rambus Crypto Accelerator AES-AE–Fast Hardware Cores offload compute intensive cryptographic algorithms in SoC’s CPU at 100x performance (when run at identical frequencies) and 10% of the power consumption compared to running the same algorithms in software. The Crypto Accelerator Hardware Cores offer chipmakers an easy-to-integrate technology-independent soft-macro security solution, offering various levels of ...

1 to 30 MHz Intermediate-Frequency Amplifier with Wide Gain Range IFA consists of 3 stages amplifier with tunable gain, AGC system, linear buffer for analog output and an analog-digital converter (ADC) for 2-bits digital output and a detector of output level. The amplifier has differential inputs and outputs. Gain is sequentially reduced from the last stage to the first stage. This method allows to keep a low noise figure in wide gain range. In the analog output mode the circuit control...

Windows & Linux Drivers for the Expresso DMA Core The Northwest Logic Expresso DMA Driver from Rambus is specifically designed to be used with the Expresso DMA Core. It supports all DMA modes supported by the Expresso DMA Core. Together the driver and core provide a complete, pre-packaged, flexible DMA system. The Expresso DMA Driver includes support for: • Device registers and memory reads and writes • DMA read and write transfers • Low-level performance statistics • Lega...

Bluetooth Controller Synopsys’ DesignWare® Controller IP for Bluetooth low energy, Thread, and Zigbee delivers secure, concurrent wireless connectivity for Internet of Things (IoT) applications such as wearables, industrial, smart homes, and smart cities. The controller incorporates advanced data encryption and random number generation for secure wireless connections, and allows multiple simultaneous connections between supported protocols in a single instantiation. It also provides val...

The S3ADSD24M14BC40LP is a compact, low power 14-bit ADC IP implemented with a Continuous-Time Sigma-Delta Modulator. With an input signal bandwidth of 12MHz, this ADC features an outstanding dynamic performance including 69.0dB SNR, 75.0dB SFDR and 11.0-bit ENOB. This IP includes also the Voltage Reference Buffers and the Digital Decimation Filter. The throughput rate, after decimation, is 50MS/s. The total IP, including the References Buffers and the Decimation Filter, dissipates a t...

MIPI M-PHY Gear4 IP (Silicon Proven in UMC 28HPC+) The MIPI M-PHY Gear 4 IP is compliant with the latest MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v4.1 Specification, UniPro v1.8 Specification, and Universal Flash Storage (UFS) v3.0 Specification. A serial interface technology with high bandwidth capabilities and supports HS Gear4 rates up to 11.6Gbps, which is particularly developed for mobile applications to obtain low pin count combined with very good power...

Comcores 10G/25G Ethernet MAC provides a complete IEEE 802.3 Ethernet Layer 2 solution. The MAC IP core performs the Link function of the 10G/25G Ethernet ...

MIPI D-PHY 4 Lane CSI2-TX 1.2G in TowerJazz 110nm The MXL-DPHY-CSI2-TX is a high-frequency low-power, low-cost, source synchronous, Physical Layer supporting the MIPI Alliance Standard for D-PHY. The IP is configured as a MIPI master optimized for camera interface applications (CSI-2). The High-Speed signals have a low voltage swing, while Low-Power signals have large swing. High-Speed functions are used for High-Speed data traffic while low power functions are mostly used for control. V...

AES (ECB-CBC-CFB-CTR), 1 Billion Trace DPA Resistant Cryptographic Accelerator Cores Rambus DPA Resistant AES-FBC Cryptographic Accelerator Cores offload compute intensive cryptographic algorithms in SoC’s CPU at 100x performance (when run at identical frequencies) and 10% of the power consumption compared to running the same algorithms in software. The Crypto Accelerator Hardware Cores offer chipmakers an easy-to-integrate technology-independent soft-macro security solution, offering v...