DMA AXI4-Stream to/from AXI4 Memory Map - Scatter-Gather Command Stream List
The Digital Blocks DB-DMAC-MC2-CS-MM2S-S2MM Verilog RTL IP Core is a Multi-Channel Scatter-Gather DMA Controller that transfers data between AXI4 Memory ...
Digital Blocks Multi Channel Scatter Gather Stream Interfaces Status Stream Axi4 Stream Interface Xi4 Memory Map
Source: design-reuse.com