Codasip® now offers the Tessent™ Enhanced Trace Encoder solution from the Tessent Embedded Analytics product line at Siemens EDA with its customizable RISC-V cores. Through the joint solution, developers can efficiently trace and debug issues between silicon and software, and accurately understand real-time behaviors of even the most complex customized designs based on Codasip RISC-V processors™.
The Tessent Enhanced Trace Encoder is the market-leading trace solution for RISC-V. It is a fully‑featured solution that provides a mechanism to monitor .
The Tessent Embedded Analytics solution can be used to produce health and operational metrics throughout the lifecycle of an SoC. Embedded software based .
The Tessent Embedded Analytics NoC Monitor provides non-intrusive monitoring of interconnect activity across the AMBA 5 CHI (Coherent Hub Interface) network-on-chip .
Tessent Embedded Analytics provides a scalable, flexible and powerful functional monitoring platform that enables chip designers to implement hardware-based .