RISC-V (pronounced RISC-5) is the brainchild of UC Berkeley professors David Patterson and Krste Asanović. Patterson has a talent for catchy acronyms and architectures as a developer of RISC (Reduced Instruction Set Computing) and RAID (Redundant Array of Inexpensive Disks) in the 1980s. They outlined the case for RISC-V in this paper. What is an ISA? An ISA as an interface -- similar to an Application Programming Interface (API) -- for CPU operations. A compiler or interpreter translates your high-level language, such as C, into ISA commands for the processor to perform work. Each ISA instruction is implemented by the underlying hardware. So, ISA designs need to consider how their instructions will affect the price/performance of the CPU. That's why ARM, for example, requires most license holders to use their hardware designs as well.