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EDA in the Cloud: Astera Labs, AWS, Arm, and Cadence Report

Earlier this week I wrote a post covering the AWS presentation from HOT CHIPS about the Nitro project. Although the Nitro chips all contain Arm processors, . ....

Anthony Liguori , Eda In The Cloud Astera Labs , Nd Cadence Report , Breakfast Bytes , Paul Mclellan ,

4nm 112G-ELR SerDes PHY IP

That's a lot of buzzwords! I assume you already know that SerDes stands for serializer-deserializer. It is an IP block that takes parallel data from buses . ....

4nm 112g Elr Serdes Phy Ip , Breakfast Bytes , Paul Mclellan ,

Chiplet Summit: Challenges of Chiplet-Based Designs

I wrote the first post, The Chiplet Summit, from the recent Chiplet Summit in San Jose, If you have not seen that, you should probably read it first. . ....

Chiplet Summit , San Jose , Chiplet Summit Challenges Of Based Designs , Breakfast Bytes , Paul Mclellan ,

HPSC: RISC-V in Space

NASA needs a new computer. Being NASA, of course, this has an acronym, HPSC. Unusually for NASA, this has four letters, not three. Remember back in the . ....

Propulsion Laboratory In Pasadena , High Performance Space , Propulsion Laboratory , Hpsc Riscv In Space , Breakfast Bytes , Paul Mclellan ,

IEDM: TSMC N3 Details

As you know from previous blog posts, I attended IEDM in San Francisco in December. There were two presentations about TSMC's N3 process. This is actually . ....

San Francisco , United States , Iedm Tsmc N3 Details , Breakfast Bytes , Paul Mclellan ,