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In this article, we go through a formal-based, easy-to-deploy RISC-V processor verification application. We show how, together with a RISC-V ISA golden model and RISC-V compliance automatically generated checks, we can efficiently target bugs that would be out of reach for simulation.
Embedded World 2023, held last month in Nuremberg, looked to provide a platform for the embedded community and with over 950 exhibitors it certainly afforded exhibitors an opportunity to demonstrate the very latest embedded technologies whether modules, operating systems, hardware and software designs, M2M communications, services, or complex system designs.
Codasip and IAR are providing new levels of support for low-power embedded automotive applications through a combination of the Codasip L31 core and the safety-certified version of the development toolchain IAR Embedded Workbench for RISC-V.
ISO 26262-certified tools from IAR support reference design based on the award-winning Codasip L31 core embedded world, Nuremberg, Germany, 14 March 2023 – Codasip and IAR deliver new possibilities for low-power embedded automotive applications through the award-winning Codasip L31 core and the safety-certified version of the development toolchain IAR Embedded Workbench for RISC-V...
The L50(F) is a medium-sized, efficient 32-bit embedded RISC-V processor aimed at embedded systems with mid-range processing requirements. The core has ...