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Imperas extends RISC-V processor verification ecosystem Imperas Software, a specialist in RISC-V processor verification technology, has announced the latest addition to its suite of RISC-V Verification IP (VIP) solutions. This solution includes Floating-Point architectural validation test suites covering the RISC-V Specifications for 32bit Single-Precision (32F), 64bit Single-Precision (64F), and 64bit Double-Precision (64D). The tests are designed to extend the company's current range of tests for ratified and near-ratified specifications tests, and complement the de...

Imperas Leads The RISC-V Processor Verification Ecosystem Verification IP extended with Floating-Point architectural validation test suites based on golden reference model and coverage-based development. Oxford, United Kingdom, January 25th, 2021 — Imperas Software Ltd., the leader in RISC-V processor verification technology, today announced the latest addition to the Imperas RISC-V Verification IP (VIP) solutions with the Floating-Point architectural validation test suites covering the RISC-V Specifications for 32bit Single-Precision (32F), 64bit Single-Precision (64F), and 64bit Double-P...

Imperas is providing free simulator, architectural validation test suites and SystemVerilog components for verifying RISC-V system-on-chip designs