Page 13 - Zip Core News Today : Breaking News, Live Updates & Top Stories | Vimarsana

Voltage Optimization Modules Two patented IPs and a design methodology to estimate and track the minimum supply voltage (Vmin) for each individual circuit in the field: * TMFLT-S IP (Timing Fault Sensor) Estimates the Fmax/Vmin of the circuit during a calibration phase * TMFLT-R IP (Timing Fault Ring) : Tracks either the minimum voltage operation (Vmin) or the maximum clock frequency (Fmax) during run-time phase * TMFLT Sensor implementation methodology: Allows choosing the best register candidates to insert TMFLT Sensors. Allowing to minimize the area overhead to les...

Mem Test Analyzer Core The Northwest Logic Mem Test Analyzer Core from Rambus is used to capture the results from Northwest Logic Memory Test Core. The Mem Test Analyzer Core can be used in conjunction with the Memory Test Core to capture the actual and expected test data. The capture is initiated by an error trigger signal provided by the Memory Test Core. This data can then be retrieved from the Mem Test Analyzer Core via the chip’s configuration & status bus, on-chip processor or dedicated low-pin count serial port. Rambus also offers easy-to-use scripts, driver and USBI2C bridge...

AES (ECB), 1 Billion Trace DPA Resistant Cryptographic Accelerator Cores Rambus Crypto Accelerator AES-AE–Fast Hardware Cores offload compute intensive cryptographic algorithms in SoC’s CPU at 100x performance (when run at identical frequencies) and 10% of the power consumption compared to running the same algorithms in software. The Crypto Accelerator Hardware Cores offer chipmakers an easy-to-integrate technology-independent soft-macro security solution, offering various levels of cryptographic acceleration performance. They are easy to integrate into various SoC and FPGA archi...

1 to 30 MHz Intermediate-Frequency Amplifier with Wide Gain Range IFA consists of 3 stages amplifier with tunable gain, AGC system, linear buffer for analog output and an analog-digital converter (ADC) for 2-bits digital output and a detector of output level. The amplifier has differential inputs and outputs. Gain is sequentially reduced from the last stage to the first stage. This method allows to keep a low noise figure in wide gain range. In the analog output mode the circuit controls the gain so that the magnitude of the differential output signal. The signal level is set through ...

Windows & Linux Drivers for the Expresso DMA Core The Northwest Logic Expresso DMA Driver from Rambus is specifically designed to be used with the Expresso DMA Core. It supports all DMA modes supported by the Expresso DMA Core. Together the driver and core provide a complete, pre-packaged, flexible DMA system. The Expresso DMA Driver includes support for: • Device registers and memory reads and writes • DMA read and write transfers • Low-level performance statistics • Legacy, MSI, MSI-X interrupts The Expresso DMA Driver creates and manages descriptor chains in system ...