Page 160 - P Core News Today

ACS-AIP-MPHY-28HPM MIPI Specification Version 3.0 is a low pin count, power efficient, inter-chip serial interface with high bandwidth capabilities. A ...

Everyday there are millions of devices that enter the IoT that contain a processor that must be maintained, monitored and securely managed. Not every ...

Synopsys’ complete DesignWare CCIX IP solution consisting of controller, PHY and verification IP, delivers data transfer rates up to 25Gbps and supports ...

The Arasan I3C Slave Controller IP Core Implements Slave functionality as defined by the MIPI Alliance’s I3C Specification. The I3C bus is used for ...

NEMA®|dc is a powerful display controller which contains several smart tools and functionalities to compose multiple graphics and video layers by improving ...

The MIPI UniPro IP core complies with the UniPro specification version 1.4.

The multi-channel DesignWare® PHY IP for PCI Express® (PCIe®) 5.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s demands ...

NSCores PermSRAM(R) is the only embedded CMOS, one time programmable (OTP), non-volatile RAM IP of its kind, utilizing the hot carrier effect to trap ...

The GRETH core implements 10/100 Mbit/s Ethernet Media Access Controller (MAC) with AMBA host interface. The core implements the 802.3-2002 Ethernet standard. ...

The Synopsys DesignWare® DDR5/4 PHY is a complete physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications requiring ...