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August 26, 2022
Vidatronic provides power management, analog, and security intellectual property (IP) licenses and platform solutions for integration into customers ...
August 25, 2022
Worlds first audio DSP IP with RISC-V Vector processor architecture RiVAI-V1 is a dual-issue, Out-of-Order execution, 7-stage pipeline, 32-bit RISC-V ...
August 24, 2022
Rambus GDDR6 Controller Core is designed for use in applications requiring high memory throughput, high clock rates and full programmability. The core ...
August 23, 2022
Synopsys’ integrated DesignWare C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and ...
August 23, 2022
WhisperTrigger allows your system to detect voice activity and increase its battery life. Our robust and silicon-proven, Voice Activity Detection solution, ...
August 22, 2022
The eSecure IP is a single subsystem for SoC/ASIC/FPGA to address key security challenges, playing the role of root-of-trust. The module is highly flexible ...
August 21, 2022
The AresCORE 16G Die-to-Die (D2D) IP implements a wide-parallel and clock forwarded PHY interface for multichannel interconnections up to 16Gbps. The ...
August 19, 2022
The MIPI I3C interface is an evolutionary standard that improves upon the features of I2C, while maintaining backward compatibility. This standard offers ...
August 19, 2022
The DesignWare 200/400G and 800G Ethernet MAC and PCS IP solutions enable a host to transmit and receive data over Ethernet. The PCS IP is optimized for ...
August 19, 2022
The Cadence UCIe PHY is a high-bandwidth, low-power and low-latency die-to-die solution that enables multi-die system in package integration for high ...