Page 79 - P Core News Today

The Rambus DMA Driver from is specifically designed to be used with the Rambus DMA Core. It supports all DMA modes supported by the DMA Core. Together ...

M31 provides a silicon-proven, low-power and low cost C-PHY/D-PHY combo IP in different process nodes. User can configure the PHY into D-PHY mode or C-PHY ...

This ultra high speed wide-band Analog-to-Digital Converter is based on 16 Time Interleaved Pipeline sub-ADC followed by a digital correction algorithm ...

The RAR-iLR-qLR.01 Retention Alternating Regulator enables this combination embedding two regulation sub-components: a switching regulator (eSR) and an ...

The OTU2/2e Digital Wrapper IP Core offers 10G/s client transport rate over Optical Transport Network (OTN), specified by ITU-T G.709 recommendation. ...

Image scaling is a process of constructing a resized image from a given input image. The constructed image can be smaller, larger, or equal in size, depending ...

Audio Weaver® an Audio SW Development Platform, an Audio drag and drop EDA suite if you like, to streamline the audio algorithm SW development process ...

The D68000-CPU32 soft core is binary-compatible with the industry standard 68000’s CPU32 version of the 32-bit microcontroller. The D68000-CPU32 has ...

PUFef is the extension function available for PUFrt, extending the Hardware Root of Trust to protect critical assets in the embedded Flash. PUFef can ...

With sophisticated architecture and advanced technology, KNiulink multi-mode transceiver IP with PMA and PCS layer is designed for low power and high ...