SHA256 Encoder and Decoder IP Core
SHA256 is a Secure Hash Algorithms which is one of the latest hash functions standarized by the U.S Federal Government. SHA 256 IP Core Algorithm implements ...
Source: design-reuse.com
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MIPI DSI-2 Controller for Automotive
The DesignWare® MIPI® DSI/DSI-2 Host and Device Controller IP solutions are fully verified and configurable controllers that implement all the protocol ...
Synopsy Designware Alliance Display Command Set Device Controller Device Controllers Display Command Set Csi 2
Source: design-reuse.com
30-200 MHz DLL-based frequency multiplier IP Core
055TSMC_DLL_01 is a frequency multiplier that combines low phase jitter of clock signal, small area and low current consumption. Block wakes up in “pass-through” ...
Frequency Multiplier 0 200 Mhz Dll Based Frequency Multiplier 55tsmc Dll 01 P Core Ilicon Ip Emiconductor Ip
Source: design-reuse.com
H.264 4K Decoder - Supports 4KP60, 4:2:2, 10Bits
The H.264 Decoder Core is a highly optimized, high resolution decompression engine targeted primarily at FPGAs. It is well suited for various applications ...
Source: design-reuse.com
DVB-S2X LDPC BCH Encoder + Decoder NB/WB
The DVB-S2X LDPC Decoder is a powerful FEC core decoder for Digital Video Broadcasting via Satellite. It implements extensions to the DVB-S2 design for ...
Digital Video Broadcasting Dvb S2x Vb S2x Ldpc Bch Encoder Decoder Nb Wb Global Ip Core P Core Ilicon Ip Emiconductor Ip
Source: design-reuse.com
DVB-S2 LDPC Decoder and Encoder - Global IP Core
The DVB-S2 LDPC-BCH block is a powerful FEC (Forward Error Correction) subsystem for Digital Video Broadcasting via Satellite.
Forward Error Correction Dvb S2 Ldpc Decoder Encoder Fec Vb S2 Ldpc Decoder And Encoder Global Ip Core Vb S2 Ldpc Decoder And Encoder Asic Or Fpga Global Ip Core P Core Ilicon Ip
Source: design-reuse.com
Whirlpool Crypto Accelerator IP Core
Rambus DPA Resistant Hardware Cores prevent against the leakage of secret cryptographic key material through attacks when integrated into an SoC or FPGA. ...
Hardware Cores Cipher Block Chaining Authenticated Encryption Galois Counter Rambus Dpa Resistant Core Whirlpool Hirlpool Crypto Accelerator
Source: design-reuse.com
Embedded Flash Protection with Hardware Root of Trust and Lite Crypto Engine
PUFef is the extension function available for PUFrt, extending the Hardware Root of Trust to protect critical assets in the embedded Flash. PUFef can ...
Hardware Root Flash Protection Embedded Flash Root Of Trust Asset Protection Mbedded Flash Protection With Hardware Root Of Trust And Lite Crypto Engine
Source: design-reuse.com
AES-GCM Ultra-Low Latency IP Core
The AES-GCM Ultra-low latency crypto engine is targeted for CXL link encryption with an implementation of the AES-GCM algorithm compliant with the NIST ...
Source: design-reuse.com
Wi-Fi 802.11 ax/Wi-Fi 6 /Bluetooth LE v5.3/15.4-2.4GHz RF Transceiver IP for IOT Application in TSMC22 ULL
Fully compliant with 2.4GHz IEEE 802.11ax and Bluetooth standards, this WiFi 802.11 ax/Bluetooth LE v5.3/15.4-2.4GHz RF Transceiver IP is available in ...
Source: design-reuse.com