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Making the most of the 60th DAC

I just returned from a week in San Francisco where I attended the 60th Design Automation Conference. It was a typical week at DAC cold weather in . ....

San Francisco , United States , Making The Most Of 60th Dac , Codasip Blog , Brett Cline ,

Developing a customized RISC-V core for MEMS sensors

We recently described how Codasip Labs is working with the NimbleAI project to push the boundaries of neuromorphic vision. Let’s talk about another . ....

European Union , Codasip Labs , Codasip Studio , Developinga Customized Riscv Core For Mems Sensors , Codasip Blog , Tora Fridholm ,

No one-size-fits-all approach to RISC-V processor optimization

As the demand for high-performance processors continues to grow and semiconductor scaling laws continue to show their limits, the need for processor optimization . ....

No One Size Fits All Approach To Riscv Processor Optimization , Codasip Blog , Mike Eftimakis ,

Shifting left for success: Highlights from the Siemens EDA User 2 User conference

I was at the Siemens EDA User 2 User conference in Munich last week. This one-day event is the perfect opportunity to learn, grow and connect with technical . ....

Shifting Left For Success , Codasip Blog , Auranne Choquin ,

RISC-V customization, HW/SW co-optimization, and custom compute

Do we still need to introduce and define RISC-V? You know, the open-source instruction set architecture (ISA) that is gaining popularity thanks to its . ....

Riscv Customization , W Sw Co Optimization , Nd Custom Compute , Codasip Blog , Mike Eftimakis ,