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Week In Review: Design, Low Power

Week In Review: Design, Low Power
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New Electronics - Imperas RISC-V test suites now available free with riscvOVPsimPlus

Imperas Software, a supplier of RISC-V simulation solutions, has announced the latest RISC-V test suites and updates to the free riscvOVPsimPlus reference model, simulator and test suites. ....

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Imperas Announces Partnership with Breker to Drive Rigorous Processor to System Level Verification for RISC-V

Imperas Software Ltd., the leader in RISC-V simulation solutions, today announced a partnership with Breker Verification Systems, a leading provider of advanced test content synthesis solutions for SoC, UVM and Post-Silicon verification environments. With a combined approach to standards-based verification, development teams will be able to efficiently transition from RISC-V processor functional design verification (DV) right… ....

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Imperas announce the latest RISC-V test suites are now available free with riscvOVPsimPlus

Imperas Software Ltd., the leader in RISC-V simulation solutions, today announced the latest RISC-V test suites and updates to the free riscvOVPsimPlus reference model, simulator and test suites. Independently developed Verification IP (VIP) plays an important role in any verification plan since RISC-V developers’ interpretation of the specification are best tested against an independent reference. Architectural Validation… ....

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New Electronics - NSITEXE selects ImperasDV for automotive RISC-V processor verification

Imperas Software, a specialist in RISC-V simulation solutions, has announced that NSITEXE, part of the DENSO Corporation that develops high-performance semiconductor IP for automotive applications, has selected ImperasDV for advanced RISC-V processor hardware design verification. ....

Simon Davidmann , Nobuyuki Ueyama , Hideki Sugimoto , Nsitexe Inc , Imperas Software , Artificial Intelligence , Instruction Set Architecture ,