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AMD's Been Planning Its V-Cache Ryzen Chips for Quite Some Time

AMD's Been Planning Its V-Cache Ryzen Chips for Quite Some Time
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Yuzo Fukuzaki , Through Silicon Vias , Broadwell Quad , மூலம் சிலிக்கான் வியச் ,

AMD Demonstrates Stacked 3D V-Cache Technology: 192 MB at 2 TB/sec


The AMD team surprised us here. What seemed like a very par-for-the-course Computex keynote turned into an incredible demonstration of what AMD is testing in the lab with TSMC’s new 3D Fabric technologies. We’ve covered 3D Fabric before, but AMD is putting it to good use by stacking up its processors with additional cache, enabling super-fast bandwidth, and better gaming performance. That’s the claim at any rate, and AMD showcased its new demo processor on stage at Computex. Here’s a deeper run-down into what it actually is.
3D Chiplets: The Next Step
AMD announced it was looking into 3D stacking technologies with ‘X3D’ back in March 2020 at its Financial Analyst Day, with a very odd diagram showing a chiplet processor with what looked like stacks of HBM or some sort of memory around the outside. At the time AMD said it was a mix of 2.5D and 3D packaging technologies enabling 10x bandwidth density or higher. The ‘X’ in ‘X3D’ was meant to stand for Hybri ....

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