Page 154 - P Core News Today

The DisplayPort Forward Error Correction (FEC) Transmitter IP Core implements Reed-Solomon FEC and symbol interleaving as specified by the VESA DisplayPort ...

Our range of CryoCMOS IP is suitable for operation at the extremely low temperature required for Quantum Computing (QC) applications. This CryoIP ™ ...

Comcores Radio Over Ethernet Structure Agnostic Mapper/Demapper IP core is a silicon agnostic implementation of the structure agnostic mapping method ...

OPENEDGES is the only total memory system IP company providing Network on-Chip Interconnect (OIC), LPDDR54 Orbit Memory Controller (OMC), and LPDDR54 ...

Synopsys provides designers with silicon-proven, configurable DesignWare® USB 3.1 Type-C Controllers that are compliant with the USB-Implementers Forum ...

The EFLX® 1K Logic IP tile is an eFPGA (embeddable FPGA) IP tile with power management containing 560 Look-Up-Tables (LUTs: each is 6-input, or dual-5-input, ...

The L10 is a small, efficient 32-bit embedded RISC-V processor aimed at embedded systems with more modest processing requirements. The core has a 3-stage ...

The MXL-DPHY-UNIV is a high-frequency low-power, low-cost, source-synchronous, physical Layer. The PHY can be configured as a MIPI Master or MIPI Slave ...

The ASRC-pro (CWda52) is part of Coreworks family of multi-channel Asynchronous Audio Sample Rate Converters (ASRC). This core can be used to interface ...

The CT1008-TCP/IP is an FPGA Synthesisable 10 or 25Gbit Ethernet TCP server/client in a lean and fast, all-RTL solution The IP block provides an easy ...