05/24/2021 | Press release | Distributed by Public on 05/24/2021 00:14 GUC Announces GLink-3D Die-on-Die Interface IP using TSMC N5 and N6 Process for 3DFabric⢠Advanced Packaging Technology Hsinchu, Taiwan - May 24, 2021 - Global Unichip Corp. (GUC), the Advanced ASIC Leader, announces GLink-3D die-on-die interface IP using TSMC's N5 and N6 processes and 3DFabricâ¢advanced packaging technology for AI, HPC, and Networking applications. AI/HPC/Networking memory demand is growing quickly and the SRAM to Logic ratio is also increasing. Logic gains higher density and performance when scaled to N5/N3 process nodes but SRAM scaling from N7 to N5/N3 is moderate. SRAM/Logic disintegration allows the implementation of separate SRAM and Logic at the most efficient process nodes. Layers of CPU and SRAM (Last Level Cache, packet buffers) dies can be assembled over and under interconnect/IO dies using TSMC 3DFabric packaging technology. Such expandable SRAM and modular computing applications are enabled by GUC GLink-3D high bandwidth, low latency, low power, and point-to-multipoint interface between 3D stacked dies. CPUs, SRAMs, Interconnects, and I/Os (SerDes, HBM, DDR) can be implemented in the most efficient process nodes. Different die combinations can be assembled to address different market segments. At boot time, assembled SRAM and CPU dies are identified, unique die IDs are distributed, available memory space and computing resources are defined and a point-to-multipoint GLink-3D interface to the stacked dies is enabled.